Bienvenue sur E-circuits !

Your online PCB Service

Design Rules

Rules schematic


Copper Layers :

Top / Bottom :

Track Width (A):  ≥ 150 µm

Clearance (B):  ≥ 150 µm

Inner Layers :

Track Width (A):  ≥ 125 µm

Clearance (B):  ≥ 125 µm

 

Copper Clearance to Board Edge (J) :  ≥ 450 µm

 

Plated Through Hole Vias :

Pad Size (C):  0.60 mm 

Drill Hole Diameter (D):  0.35 mm

Final Hole Diameter (E):  0.25 mm

Solder Mask Opening (F):  ≥ Drill Hole Diameter + 0.15 mm

 

Solder Mask :

Clearance (I):  ≥ 50 µm

Web (G):  ≥ 70 µm

Coverage (H):  50 µm

Via Opening (F):  ≥ 0.35 mm

 

Silkscreen :

Line Width (M):  ≥ 100 µm

Font Size (L):  ≥ 1.5 mm

Distance to Solder Mask Opening (K):  100 µm

 

Panelization :

Circuits spacing :  ≥ 1.6 mm